AI chips running hot: Samsung and SK Hynix prepare new cooling for HBM4E memory
AI chip packages are getting bigger – and hotter. Samsung is preparing several cooling technologies for its HBM4E memory, while SK Hynix is betting on new materials.
Graphic: TERRA WORLD NEWS (own graphic based on the sources listed)
The carriers on which compute chips and memory stacks for AI accelerators sit side by side are growing fast. According to South Korean newspaper Chosun Biz, these so-called interposers are already about 5.5 times the maximum area of 858 square millimetres that an EUV lithography machine can expose in a single shot. Industry insiders expect them to grow to 9 and 12 times that size and eventually to around 40 times. The drivers are limits on shrinking chip structures and the spread of chiplet-based designs.
For HBM4E memory, which Samsung plans to mass-produce from 2027, the company is therefore preparing several cooling solutions. With hybrid copper bonding, memory layers are joined directly via copper surfaces instead of tiny solder bumps, making the stack thinner and better at shedding heat. Samsung showed the technology at Nvidia's GTC conference in March. It is also validating a dedicated heat path in the base die, to be introduced with HBM5. Rival SK Hynix is taking a different route, according to trade paper ETNews: its iHBM concept places highly heat-conductive but electrically insulating materials around particularly hot areas of the chip. This is expected to cut thermal resistance by about 30 percent.